FIG. 6 is a perspective view showing a temperature sensing device 10, which is an example of a pin-limited IC device. Temperature sensing device 10 is housed in a standard three-pin IC package including power/ground pins 11 and 12, and output 13 that extend from a package substrate 14. An IC chip 15, which is fabricated using known photolithographic (e.g., CMOS) fabrication techniques, is mounted on the package substrate 14 such that external nodes of IC chip 15 are electrically connected to pins 11, 12 and 13. A protective cover 16 is mounted on package substrate 14 over IC chip extending from a package substrate. Temperature sensing device 10 is thus a fully packaged device that is included in (e.g. soldered to) a host system (not shown), for example, by way of a printed circuit board. During operation, temperature sensing device 10 receives a high voltage supply from the host system on voltage supply pin 11, and a low voltage supply on ground pin 12 during normal operation. Temperature sensing device 10 asserts a (e.g., high) output signal on output pin 13 when temperature sensing device 10 (and, hence, the host system) is exposed to a predetermined temperature (e.g., 65° C.). While temperature sensing device 10 remains below the predetermined temperature, the output signal generated on output pin 13 remains de-asserted (e.g., low).
FIG. 7 is a block diagram showing functional components of temperature sensing device 10. Temperature sensing device 10 generally includes a sensor circuit 20 that generates a sensor signal VSENSOR on an internal node A whose voltage level is determined by a sensed temperature, a reference generator (e.g., bandgap) circuit 22 for generating a predetermined reference signal VREF on an internal node B representing the predetermined temperature, a comparator 24 for comparing the temperature and reference signals, for generating an appropriate output signal VOUT on output pin 13. Comparator 24 generates a low output signal VOUT when, for example, the voltage level of sensor signal VSENSOR is less than reference signal VREF, and generates a high output signal VOUT when the voltage level of sensor signal VSENSOR is greater than reference signal VREF.
Like all ICs, it is desirable for a manufacturer to test temperature sensing device devices in order to verify that they operate as intended prior to assembly in a host system. One conventional temperature sensing device testing procedure involves placing the temperature sensing device devices in a temperature-controlled apparatus, and measuring the devices' responses to various ambient temperatures. A problem with this approach is that the use of temperature-controlled apparatus is time consuming and expensive, and does not facilitate access to internal nodes of the temperature sensing device, which may be necessary to troubleshoot and identify the source of design or fabrication errors. A second conventional testing procedure avoids the problems associated with the use of temperature-controlled apparatus by simulating the test temperatures using appropriate voltage signals applied to selected internal nodes of the temperature sensor, and/or by reading signals generated at internal nodes (e.g., nodes A and B) in response to applied stimuli. By accessing an internal node, one can electrically mimic temperature cycling and thus test the part quickly and efficiently at a single temperature, possibly room temperature. However, in general, accessing the internal nodes of a pin-limited IC device requires suspending normal operation, and putting the device into a test mode in which signals may be passed to or read from selected internal nodes (e.g., sensor signal VSENSOR from node A, or reference voltage VREF from node B; see FIG. 7) from one of the external pins. Because the power supply pins (e.g., power supply pin 11 and ground pin 12) are required to power temperature sensing device 10 during both normal and test mode operations, the only external pin that can be utilized to pass signals to or from selected internal nodes is output pin 13. Moreover, the mechanism for entering the test mode is preferably performed by applying a signal to one or more existing external pins, which for the reasons provided above typically requires the use of output pin 13. However, the signal used to switch temperature sensing device 10 into the test mode must be selected such that the signal is not accidentally applied to output pin 13 during normal operation (or else the temperature sensing device 10 may inadvertently enter the test mode and fail to perform as expected). For devices having a multitude of pins, one can easily inject a signal into a dedicated pin that causes an internal signal to be routed out on another pin. Therefore, for pin-limited devices such as 3-pin temperature sensing device 10, the task of entering a test mode becomes non-trivial.
What is needed is a method for testing pin-limited IC devices that avoids the need for the addition of extra pins. In particular, what is needed is a test mode control circuit that is enabled in response to a signal applied to the external pins of a pin-limited IC device that would not occur during normal operation of the device.